IAN LANG ELECTRONICS
This is in fact the completion of the diffusing between n and p type materials. As you can see, the remainder of the epitaxial layer sits in a sandwich between layers of p type material.
There are some caveats to observe here: the constraints of the size and construction mean that it is not possible to put large amounts of power through the device, and the capacitor will not be outside of the picofarad range. Resistors will be quite low value too, and any requirement for larger resistors or capacitors must be attached as external discrete components.
It is not possible to construct an inductor and by extension a transformer onto the chip. These must be external too.
It remains now only to fabricate the internal connections between the components and this is the topic of our next study.
Once again we have to create another silicon oxide mask to protect the parts we wish not to diffuse and expose those that we do. The process is exactly the same other than the fact that we are using a different mask. We end up with something similar to the following diagram:
As can be seen, here we diffused once again into the epitaxial layer, and changed part of the n-type material it originally was into a p type. We now have n and p types able to
interconnect in each component and simultaneously each component is isolated from any other.
Next we diffuse once again . This time we are adding n+ impurities. This is a more highly concentrated n layer and leads to better conduction when the leads are connected. Masking off for this and diffusing, we now have the following situation:.